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Quantification of a spike-based winner-take-all VLSI network


Oster, M; Yingxue, W; Douglas, R; Liu, S-C (2008). Quantification of a spike-based winner-take-all VLSI network. IEEE Transactions on Circuits and Systems - Part I: Regular Papers, 55(10):3160-3169.

Abstract

We describe a formalism for quantifying the performance of spike-based winner-take-all (WTA) VLSI chips. The WTA function non-linearly amplifies the output responses of pixels/neurons dependent on the input magnitudes in a
decision or selection task. In this work, we show a theoretical description of this winner-take-all computation which takes into consideration the input statistics, neuron response variance, and output rates. This analysis is tested on a spiking VLSI neuronal network fabricated in a 4-metal, 2-poly 0.35\,$\mu$m CMOS process. The measured results of the winner-take-all performance from this chip correspond to the theoretical prediction. This formalism can be applied to any implementation of spike-based neurons.

We describe a formalism for quantifying the performance of spike-based winner-take-all (WTA) VLSI chips. The WTA function non-linearly amplifies the output responses of pixels/neurons dependent on the input magnitudes in a
decision or selection task. In this work, we show a theoretical description of this winner-take-all computation which takes into consideration the input statistics, neuron response variance, and output rates. This analysis is tested on a spiking VLSI neuronal network fabricated in a 4-metal, 2-poly 0.35\,$\mu$m CMOS process. The measured results of the winner-take-all performance from this chip correspond to the theoretical prediction. This formalism can be applied to any implementation of spike-based neurons.

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24 citations in Web of Science®
22 citations in Scopus®
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Additional indexing

Item Type:Journal Article, refereed, original work
Communities & Collections:07 Faculty of Science > Institute of Neuroinformatics
Dewey Decimal Classification:570 Life sciences; biology
Uncontrolled Keywords:WTA|integrate-and-fire neurons, analog, VLSI, event-based
Language:English
Date:2008
Deposited On:10 Mar 2009 16:06
Last Modified:05 Apr 2016 13:10
Publisher:IEEE
ISSN:1057-7122
Additional Information:© 2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Publisher DOI:10.1109/TCSI.2008.923430
Other Identification Number:ini:19808
Permanent URL: http://doi.org/10.5167/uzh-17642

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