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Low-voltage high CMRR OTA for electrophysiological measurements


Mitra, S; Zele, R; Etienne-Cummings, R (2009). Low-voltage high CMRR OTA for electrophysiological measurements. In: IEEE International Symposium on Circuits and Systems, 2009 (ISCAS 2009), Taipei, Taiwan, 24 May 2009 - 27 May 2009, 345 -348 .

Abstract

With the advent of miniaturised sensors for various engineering and medical applications there is an increased demand of low-power, low-voltage analog building blocks like opamps and OTAs. Degradation of certain amplifier characteristics with supply voltage is a major concern for low-voltage design and often poses contradictory requirement. CMRR (common mode rejection ratio), one such feature, is essential for sensing small bio-electric signals riding over large common-mode voltage. Here we focus on the challenging task of building a low-voltage OTA with high CMRR along with wide CMR (common mode range) and high output impedance. Robust tail current sources for a complementary differential pair OTA with folded cascode output is implemented for the purpose. The circuits are designed and simulated in 0.35 mum standard CMOS technology with supply voltage of 1.8 V. We could demonstrate a maximum of upto 40 dB increase in CMRR for a range of common-mode voltages.

Abstract

With the advent of miniaturised sensors for various engineering and medical applications there is an increased demand of low-power, low-voltage analog building blocks like opamps and OTAs. Degradation of certain amplifier characteristics with supply voltage is a major concern for low-voltage design and often poses contradictory requirement. CMRR (common mode rejection ratio), one such feature, is essential for sensing small bio-electric signals riding over large common-mode voltage. Here we focus on the challenging task of building a low-voltage OTA with high CMRR along with wide CMR (common mode range) and high output impedance. Robust tail current sources for a complementary differential pair OTA with folded cascode output is implemented for the purpose. The circuits are designed and simulated in 0.35 mum standard CMOS technology with supply voltage of 1.8 V. We could demonstrate a maximum of upto 40 dB increase in CMRR for a range of common-mode voltages.

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Additional indexing

Item Type:Conference or Workshop Item (Speech), refereed, original work
Communities & Collections:07 Faculty of Science > Institute of Neuroinformatics
Dewey Decimal Classification:570 Life sciences; biology
Language:English
Event End Date:27 May 2009
Deposited On:13 Mar 2010 10:44
Last Modified:05 Apr 2016 14:00
Publisher:IEEE
ISBN:978-1-4244-3827-3
Additional Information:© 2009 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Publisher DOI:https://doi.org/10.1109/ISCAS.2009.5117756
Related URLs:http://conf.ncku.edu.tw/iscas2009/
http://ieeexplore.ieee.org
http://www.ini.uzh.ch/node/22043

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