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Ultra low leakage synaptic scaling circuits for implementing homeostatic plasticity in neuromorphic architectures


Rovere, G; Ning, Q; Bartolozzi, C; Indiveri, G (2014). Ultra low leakage synaptic scaling circuits for implementing homeostatic plasticity in neuromorphic architectures. In: IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, Australia, 1 June 2014 - 5 June 2014, 2073-2076.

Abstract

Homeostatic plasticity is a property of biological neural circuits that stabilizes their neuronal firing rates in face of input changes or environmental variations. Synaptic scaling is a particular homeostatic mechanism that acts at the level of the single neuron over long time scales, by changing the gain of all its afferent synapses to maintain the neuron's mean firing within proper operating bounds. In this paper we present ultra low leakage analog circuits that allow the integration of compact integrated filters in multi-neuron chips, able to achieve time constants of the order of hundreds of seconds, and describe automatic gain control circuits that when interfaced to neuromorphic neuron and synapse circuits implement faithful models of biologically realistic synaptic scaling mechanisms. We present simulation results of the low leakage circuits and describe the control circuits that have been designed for a neuromorphic multi-neuron chip, fabricated using a standard 180nm CMOS process.

Abstract

Homeostatic plasticity is a property of biological neural circuits that stabilizes their neuronal firing rates in face of input changes or environmental variations. Synaptic scaling is a particular homeostatic mechanism that acts at the level of the single neuron over long time scales, by changing the gain of all its afferent synapses to maintain the neuron's mean firing within proper operating bounds. In this paper we present ultra low leakage analog circuits that allow the integration of compact integrated filters in multi-neuron chips, able to achieve time constants of the order of hundreds of seconds, and describe automatic gain control circuits that when interfaced to neuromorphic neuron and synapse circuits implement faithful models of biologically realistic synaptic scaling mechanisms. We present simulation results of the low leakage circuits and describe the control circuits that have been designed for a neuromorphic multi-neuron chip, fabricated using a standard 180nm CMOS process.

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Additional indexing

Item Type:Conference or Workshop Item (Speech), refereed, original work
Communities & Collections:07 Faculty of Science > Institute of Neuroinformatics
Dewey Decimal Classification:570 Life sciences; biology
Language:English
Event End Date:5 June 2014
Deposited On:25 Feb 2015 10:40
Last Modified:16 Aug 2017 00:17
Publisher:Proceedings of the 2014 IEEE International Symposium on Circuits and Systems (ISCAS)
Series Name:IEEE International Symposium on Circuits and Systems
Number of Pages:4
ISBN:978-1-4799-3431-7
Publisher DOI:https://doi.org/10.1109/ISCAS.2014.6865574

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