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Parallel hdr tone mapping and auto-focus on a cellular processor array vision chip


Martel, Julien N P; Muller, Lorenz K; Carey, Stephen J; Dudek, Piotr (2016). Parallel hdr tone mapping and auto-focus on a cellular processor array vision chip. In: IEEE International Symposium on Circuits and Systems (ISCAS) 2016, Montreal, Canada, 22 May 2016 - 25 May 2016, 1340-1433.

Abstract

To improve computational efficiency, it may be advantageous to transfer part of the intelligence lying in the core of a system to its sensors. Vision sensors equipped with small programmable processors at each pixel allow us to follow this principle in so-called near-focal plane processing, which is performed on-chip directly where light is being collected. Such devices need then only to communicate relevant pre-processed visual information to other parts of the system. In this work, we demonstrate how two classical problems, namely high dynamic range imaging and auto-focus, can be solved efficiently using two simple parallel algorithms implemented on such a chip. We illustrate with these two examples that embedding uncomplicated algorithms on-chip, directly where information acquisition takes place can replace more complex dedicated post-processing. Adapting data acquisition by bringing processing at the sensor level allows us to explore solutions that would not be feasible in a conventional sensor-ADC-processor pipeline.

Abstract

To improve computational efficiency, it may be advantageous to transfer part of the intelligence lying in the core of a system to its sensors. Vision sensors equipped with small programmable processors at each pixel allow us to follow this principle in so-called near-focal plane processing, which is performed on-chip directly where light is being collected. Such devices need then only to communicate relevant pre-processed visual information to other parts of the system. In this work, we demonstrate how two classical problems, namely high dynamic range imaging and auto-focus, can be solved efficiently using two simple parallel algorithms implemented on such a chip. We illustrate with these two examples that embedding uncomplicated algorithms on-chip, directly where information acquisition takes place can replace more complex dedicated post-processing. Adapting data acquisition by bringing processing at the sensor level allows us to explore solutions that would not be feasible in a conventional sensor-ADC-processor pipeline.

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Additional indexing

Item Type:Conference or Workshop Item (Speech), refereed, original work
Communities & Collections:07 Faculty of Science > Institute of Neuroinformatics
Dewey Decimal Classification:570 Life sciences; biology
Language:English
Event End Date:25 May 2016
Deposited On:26 Jan 2017 14:47
Last Modified:10 Sep 2017 12:42
Publisher:Institute of Electrical and Electronics Engineers
Series Name:IEEE International Symposium on Circuits and Systems (ISCAS)
ISSN:2379-447X
Publisher DOI:https://doi.org/10.1109/ISCAS.2016.7527519
Related URLs:http://ieeexplore.ieee.org/abstract/document/7527519/ (Publisher)
http://iscas2016.org/ (Organisation)

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