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A VLSI network of spiking neurons with an asynchronous static random access memory


Moradi, S; Indiveri, G (2011). A VLSI network of spiking neurons with an asynchronous static random access memory. In: IEEE Biomedical Circuits and Systems Conference (BioCAS) 2011, San Diego, USA, 10 November 2011 - 12 November 2011, 277 - 280.

Abstract

In this paper we present an asynchronous VLSI neuromorphic architecture comprising an array of integrate and fire neurons and dynamic synapse circuits with programmable weights. To store synaptic weight values, we designed a novel asynchronous SRAM block, integrated it on chip and connected it to the dynamic synapse circuits, via a fast current-mode DAC. The control and data signals used for programming the weights into the SRAM, as well as the standard input and output signals, are encoded using the AER representation. The device acts as a transceiver, both receiving Address-Events in input and transmitting them as output spikes. The possibility of changing the synaptic weights via the AER protocol allows the flexibility of exploring different STDP learning algorithms in a mixed SW/HW setup. We provide experimental results measured from the chip that demonstrate the correct behavior of all the circuit blocks implemented on the chip.

Abstract

In this paper we present an asynchronous VLSI neuromorphic architecture comprising an array of integrate and fire neurons and dynamic synapse circuits with programmable weights. To store synaptic weight values, we designed a novel asynchronous SRAM block, integrated it on chip and connected it to the dynamic synapse circuits, via a fast current-mode DAC. The control and data signals used for programming the weights into the SRAM, as well as the standard input and output signals, are encoded using the AER representation. The device acts as a transceiver, both receiving Address-Events in input and transmitting them as output spikes. The possibility of changing the synaptic weights via the AER protocol allows the flexibility of exploring different STDP learning algorithms in a mixed SW/HW setup. We provide experimental results measured from the chip that demonstrate the correct behavior of all the circuit blocks implemented on the chip.

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11 citations in Scopus®
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Additional indexing

Item Type:Conference or Workshop Item (Speech), refereed, original work
Communities & Collections:07 Faculty of Science > Institute of Neuroinformatics
Dewey Decimal Classification:570 Life sciences; biology
Language:English
Event End Date:12 November 2011
Deposited On:03 Sep 2014 12:19
Last Modified:12 Aug 2017 14:54
Publisher:Proceedings of IEEE Biomedical Circuits and Systems Conference (BioCAS), 2011
Series Name:IEEE Biomedical Circuits and Systems Conference (BioCAS) 2011
Number of Pages:4
Free access at:Publisher DOI. An embargo period may apply.
Publisher DOI:https://doi.org/10.1109/BioCAS.2011.6107781

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