Publication: Minitaur, an event-driven FPGA-based spiking network accelerator
Minitaur, an event-driven FPGA-based spiking network accelerator
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Neil, D., & Liu, S.-C. (2014). Minitaur, an event-driven FPGA-based spiking network accelerator. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 22, 2621–2628. https://doi.org/10.1109/TVLSI.2013.2294916
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Current neural networks are accumulating accolades for their performance on a variety of real-world computational tasks including recognition, classification, regression, and prediction, yet there are few scalable architectures that have emerged to address the challenges posed by their computation. This paper introduces Minitaur, an event-driven neural network accelerator, which is designed for low power and high performance. As an field-programmable gate array-based system, it can be integrated into existing robotics or it can offloa
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Neil, D., & Liu, S.-C. (2014). Minitaur, an event-driven FPGA-based spiking network accelerator. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 22, 2621–2628. https://doi.org/10.1109/TVLSI.2013.2294916