Publication: An event-based neural network architecture with asynchronous programmable synaptic memory
An event-based neural network architecture with asynchronous programmable synaptic memory
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Moradi, S., & Indiveri, G. (2014). An event-based neural network architecture with asynchronous programmable synaptic memory. IEEE Transactions on Biomedical Circuits and Systems, 8(1), 98–107. https://doi.org/10.1109/TBCAS.2013.2255873
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We present a hybrid analog/digital very large scale integration (VLSI) implementation of a spiking neural network with programmable synaptic weights. The synaptic weight values are stored in an asynchronous Static Random Access Memory (SRAM) module, which is interfaced to a fast current-mode event-driven DAC for producing synaptic currents with the appropriate amplitude values. These currents are further integrated by current-mode integrator synapses to produce biophysically realistic temporal dynamics. The synapse output currents are
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Moradi, S., & Indiveri, G. (2014). An event-based neural network architecture with asynchronous programmable synaptic memory. IEEE Transactions on Biomedical Circuits and Systems, 8(1), 98–107. https://doi.org/10.1109/TBCAS.2013.2255873