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Event-based circuits for controlling stochastic learning with memristive devices in neuromorphic architectures


Payvand, Melika; Muller, Lorenz K; Indiveri, Giacomo (2018). Event-based circuits for controlling stochastic learning with memristive devices in neuromorphic architectures. In: ISCAS 2018, Florence, 27 May 2018 - 30 May 2018, 1-5.

Abstract

Memristive devices have emerged as compact nonvolatile memory elements which can be used as synapses in neuromorphic architectures. However, the intrinsic stochasticity in their switching behavior, non-linear characteristics, and variability limit their operation in real systems. In this paper we propose spike-based learning circuits designed to exploit the stochastic properties of memristors. This implements a probabilistic version of a local gradient descent rule, namely the delta rule, for online learning in neuromorphic chips. The circuits proposed translate the delta error to the slope of a ramp voltage which modulates the probability of resistive switching in very low resolution (i.e. binary) memristive devices. We demonstrate the feasibility and computational power of such approach, using a spiking neural network simulator to carry out system level behavioral simulations of the neuromorphic architecture applied to a classification task of digits 0 to 4 in the MNIST data-set.

Abstract

Memristive devices have emerged as compact nonvolatile memory elements which can be used as synapses in neuromorphic architectures. However, the intrinsic stochasticity in their switching behavior, non-linear characteristics, and variability limit their operation in real systems. In this paper we propose spike-based learning circuits designed to exploit the stochastic properties of memristors. This implements a probabilistic version of a local gradient descent rule, namely the delta rule, for online learning in neuromorphic chips. The circuits proposed translate the delta error to the slope of a ramp voltage which modulates the probability of resistive switching in very low resolution (i.e. binary) memristive devices. We demonstrate the feasibility and computational power of such approach, using a spiking neural network simulator to carry out system level behavioral simulations of the neuromorphic architecture applied to a classification task of digits 0 to 4 in the MNIST data-set.

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Additional indexing

Item Type:Conference or Workshop Item (Speech), not_refereed, original work
Communities & Collections:07 Faculty of Science > Institute of Neuroinformatics
Dewey Decimal Classification:570 Life sciences; biology
Scopus Subject Areas:Physical Sciences > Electrical and Electronic Engineering
Language:English
Event End Date:30 May 2018
Deposited On:12 Mar 2019 11:15
Last Modified:15 Apr 2020 23:26
Publisher:IEEE
Number of Pages:5
OA Status:Closed
Publisher DOI:https://doi.org/10.1109/ISCAS.2018.8351544
Official URL:https://ieeexplore.ieee.org/abstract/document/8351544

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