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Development of a timing chip prototype in 110 nm CMOS technology


Caminada, L; Kilminster, B; Macchiolo, A; Meier, B; Senger, M; Wiederkehr, S (2022). Development of a timing chip prototype in 110 nm CMOS technology. Journal of physics: Conference series, 2374(1):012081.

Abstract

We present a readout chip prototype for future pixel detectors with timing capabilities. The prototype is intended for characterizing 4D pixel arrays with a pixel size of 100x100 μm$^{2}$, where the sensors are Low Gain Avalanche Diodes (LGADs). The long term focus is towards a possible replacement of disks in the extended forward pixel system (TEPX) of the CMS experiment during the High Luminosity LHC (HL-LHC). The requirements for this ASIC are the incorporation of a Time to Digital Converter (TDC) in the small pixel area, low power consumption, and radiation tolerance up to 5 × 10$^{15}$
n
$_{eq}$ cm$^{−2}$ to withstand the radiation levels in the innermost detector modules for 3000 fb$^{−1}$ of the HL-LHC (in the TEPX). A prototype has been designed and produced in 110 nm CMOS technology at LFoundry and UMC with different versions of TDC structures, together with a front end circuitry to interface with the sensors. The design of the TDC will be discussed, with the test set-up for the measurements, and the first results comparing the performance of the different structures.

Abstract

We present a readout chip prototype for future pixel detectors with timing capabilities. The prototype is intended for characterizing 4D pixel arrays with a pixel size of 100x100 μm$^{2}$, where the sensors are Low Gain Avalanche Diodes (LGADs). The long term focus is towards a possible replacement of disks in the extended forward pixel system (TEPX) of the CMS experiment during the High Luminosity LHC (HL-LHC). The requirements for this ASIC are the incorporation of a Time to Digital Converter (TDC) in the small pixel area, low power consumption, and radiation tolerance up to 5 × 10$^{15}$
n
$_{eq}$ cm$^{−2}$ to withstand the radiation levels in the innermost detector modules for 3000 fb$^{−1}$ of the HL-LHC (in the TEPX). A prototype has been designed and produced in 110 nm CMOS technology at LFoundry and UMC with different versions of TDC structures, together with a front end circuitry to interface with the sensors. The design of the TDC will be discussed, with the test set-up for the measurements, and the first results comparing the performance of the different structures.

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Additional indexing

Item Type:Journal Article, not_refereed, original work
Communities & Collections:07 Faculty of Science > Physics Institute
Dewey Decimal Classification:530 Physics
Scopus Subject Areas:Physical Sciences > General Physics and Astronomy
Language:English
Date:1 November 2022
Deposited On:16 Feb 2023 18:39
Last Modified:24 Jun 2024 03:42
Publisher:IOP Publishing
ISSN:1742-6588
OA Status:Green
Free access at:Publisher DOI. An embargo period may apply.
Publisher DOI:https://doi.org/10.1088/1742-6596/2374/1/012081
  • Content: Published Version
  • Language: English
  • Licence: Creative Commons: Attribution 4.0 International (CC BY 4.0)