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Neuromorphic analog circuits for robust on-chip always-on learning in spiking neural networks


Rubino, Arianna; Cartiglia, Matteo; Payvand, Melika; Indiveri, Giacomo (2023). Neuromorphic analog circuits for robust on-chip always-on learning in spiking neural networks. In: 2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS), Hangzhou, China, 11 June 2023 - 13 June 2023, Institute of Electrical and Electronics Engineers.

Abstract

Mixed-signal neuromorphic systems represent a promising solution for solving extreme-edge computing tasks without relying on external computing resources. Their spiking neural network circuits are optimized for processing sensory data on-line in continuous-time. However, their low precision and high variability can severely limit their performance. To address this issue and improve their robustness to inhomogeneities and noise in both their internal state variables and external input signals, we designed on-chip learning circuits with short-term analog dynamics and long-term tristate discretization mechanisms. An additional hysteretic stop-learning mechanism is included to improve stability and automatically disable weight updates when necessary, to enable continuous always-on learning. We designed a spiking neural network with these learning circuits in a prototype chip using a 180 nm CMOS technology. Simulation and silicon measurement results from the prototype chip are presented. These circuits enable the construction of large-scale spiking neural networks with online learning capabilities for real-world edge computing tasks.

Abstract

Mixed-signal neuromorphic systems represent a promising solution for solving extreme-edge computing tasks without relying on external computing resources. Their spiking neural network circuits are optimized for processing sensory data on-line in continuous-time. However, their low precision and high variability can severely limit their performance. To address this issue and improve their robustness to inhomogeneities and noise in both their internal state variables and external input signals, we designed on-chip learning circuits with short-term analog dynamics and long-term tristate discretization mechanisms. An additional hysteretic stop-learning mechanism is included to improve stability and automatically disable weight updates when necessary, to enable continuous always-on learning. We designed a spiking neural network with these learning circuits in a prototype chip using a 180 nm CMOS technology. Simulation and silicon measurement results from the prototype chip are presented. These circuits enable the construction of large-scale spiking neural networks with online learning capabilities for real-world edge computing tasks.

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Additional indexing

Item Type:Conference or Workshop Item (Paper), refereed, original work
Communities & Collections:07 Faculty of Science > Institute of Neuroinformatics
Dewey Decimal Classification:570 Life sciences; biology
Scopus Subject Areas:Physical Sciences > Artificial Intelligence
Physical Sciences > Computer Vision and Pattern Recognition
Physical Sciences > Hardware and Architecture
Physical Sciences > Information Systems
Physical Sciences > Electrical and Electronic Engineering
Language:English
Event End Date:13 June 2023
Deposited On:31 Jan 2024 10:37
Last Modified:13 Mar 2024 13:17
Publisher:Institute of Electrical and Electronics Engineers
Series Name:IEEE International Conference on Artificial Intelligence Circuits and Systems
ISSN:2834-9830
OA Status:Green
Publisher DOI:https://doi.org/10.1109/aicas57966.2023.10168620
Project Information:
  • : FunderEuropean Research Council
  • : Grant ID
  • : Project Title
  • Content: Submitted Version
  • Language: English