Implementation of a time-warping AER mapper

Abstract

In the recent implementation of neuromorphic spike based sensors, multi-neuron processors and actuators, the spike traffic between devices is coded in the form of asynchronous spike streams following the Address-Event-Representation protocol. This spike information can be modified during the transmission from one device to another by using a mapper device. In this paper we present a mapper implementation that transforms event addresses and also can delay events in time. We discuss two different architectures for implementing the time delays on an FPGA board (USB-AER), and we present an
example of the use of the time delay feature in the mapper in the implementation of an visual elementary motion detection model using the spike outputs of a temporal contrast retina.